There are semiconductor devices whose input/output circuit (I/O circuit) has a DDR (double data rate) function. The I/O circuit having the DDR function receives commands at a timing of clock CK_t and clock CK_c in a read operation or a write operation and receives write data at a timing of clock DQS_t and clock DQS_c. The consumed power in such a design and inferior data writes that are caused by the shifting of the timing of the clocks have been problems.